Low-Power VLSI Architectures for Edge Computing: Advancing Energy-Efficient AI Inference at the Device Level
DOI:
https://doi.org/10.63282/3050-9246.IJETCSIT-V4I1P101Keywords:
Low-power VLSI, Edge computing, AI inference, Energy efficiency, Pruning, Quantization, DVFS, Power gating, Latency reduction, Hardware accelerationAbstract
Edge computing has emerged as a pivotal paradigm in the deployment of artificial intelligence (AI) applications, particularly in scenarios where real-time processing and low latency are critical. However, the energy efficiency of edge devices remains a significant challenge, especially in resource-constrained environments. This paper explores the design and optimization of low-power Very Large Scale Integration (VLSI) architectures tailored for edge computing, focusing on energy-efficient AI inference. We delve into the fundamental principles of VLSI design, the challenges and opportunities in edge computing, and the state-of-the-art techniques for reducing power consumption in AI inference tasks. We also present novel algorithms and architectural innovations that can significantly enhance the energy efficiency of edge devices. Finally, we provide a comprehensive evaluation of these techniques through simulations and real-world experiments, demonstrating their effectiveness in various edge computing scenarios
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References
[1] Atienza, D. (2023). Energy-efficient edge computing for AI-driven applications. Embedded Systems Laboratory, EPFL. Retrieved from https://eems.mit.edu/wp-content/uploads/2018/08/Efficient-Edge-Compute-for-AI-driven-ApplicationsFPL.pdf
[2] IBM Research. (2023). An energy-efficient analog chip for AI inference. IBM Research Blog. Retrieved from https://research.ibm.com/blog/analog-ai-chip-inference
[3] Susskind, Z., Arora, A., Miranda, I. D. S., Bacellar, A. T. L., Villon, L. A. Q., Katopodis, R. F., de Araujo, L. S., Dutra, D. L. C., Lima, P. M. V., Franca, F. M. G., Breternitz Jr., M., & John, L. K. (2023). ULEEN: A novel architecture for ultra lowenergy edge neural networks. arXiv preprint arXiv:2304.10618. Retrieved from https://arxiv.org/abs/2304.10618
[4] Wan, W., Kubendran, R., Schaefer, C., Eryilmaz, S. B., Zhang, W., Wu, D., Deiss, S., Raina, P., Qian, H., Gao, B., Joshi, S., Wu, H., Wong, H. S. P., & Cauwenberghs, G. (2021). Edge AI without compromise: Efficient, versatile and accurate neurocomputing in resistive random-access memory. arXiv preprint arXiv:2108.07879. Retrieved from https://arxiv.org/abs/2108.07879
[5] Narayanan, V. (2023). Exploring the utilization of VLSI devices and circuits in the context of AI applications. International Journal of Intelligent Systems and Applications in Engineering. Retrieved from https://ijisae.org/index.php/IJISAE/article/download/6585/5436/11757
